발간년도 : [2018]
| 논문정보 |
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| 논문명(한글) |
[Vol.13, No.3] Design of Low-Complexity Decoder for Triple Error Correcting BCH Codes |
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| 논문투고자 |
Yong-Suk Cho, Yong-Dal Shin |
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| 논문내용 |
The Bose-Chaudhuri-Hocquenghem (BCH) codes are a class of powerful multiple-error-correcting cyclic codes. Due to its powerful error-correction performance and reasonable hardware costs, the binary BCH codes have been widely used in data communications and storage systems for error control. In this paper, a design method of low-complexity decoder for triple error correcting binary BCH codes is presented, which is modified Peterson's direct solution method. In this method, all division operations over finite field are eliminated from the computations of the error locator polynomial. BCH codes are defined over finite field and all arithmetic operations are performed over this fields. Inversion in a finite field is time consuming and requires relatively complex circuitry. In conventional decoding algorithm of BCH codes are required finite field inversion. In this paper, inversionless decoder for triple error correcting BCH codes is proposed. The decoder comprises a syndrome computation circuit, a error locator polynomial computation circuit and a error location searching circuit, which can be implemented by linear feedback shift registers and logical gates. The attractive feature of this decoder is its remarkable simplicity from the point of view of hardware implementation. Futhermore, the proposed decoder has very simple control circuit and short decoding delay. Therefore this decoder can be implemented by simple hardware and also save buffer memory which stores received sequence. |
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