발간년도 : [2019]
논문정보 

논문명(한글) 
[Vol.14, No.2] A New BitSerial/DigitParallel Multiplier in GF(2m) Using Normal Basis 

논문투고자 
YongSuk Cho, YongDal Shin 

논문내용 
The Arithmetic operations over GF(2m) have been extensively used in publickey cryptography schemes and error correcting codes. Among the arithmetic operations over GF(2m), the efficient implementation of field multiplication is of upmost importance, as field operations of greater complexity (e.g., exponentiation and division) can be performed by the consecutive use of field multiplication. Choosing the basis by which field elements are represented plays an important role in the efficient implementation of finite field multiplications. There are three popular and applicable basis, namely, polynomial basis (PB), normal basis (NB), and dual basis. Hardware implementations of finite field multiplier using normal basis are advantageous due to the fact that the squaring operation can be performed by only onebit cyclic shift at almost no cost. In this paper, a new bitserial/digitparallel multiplier using normal basis of GF(2m) is presented. The main idea of the proposed multiplier is to use this feature of normal basis. In the proposed multiplier, the bits of an operand are grouped into several digits with w bits and each digit is implemented simultaneously by bitserial multiplier. Therefore, the proposed multiplier takes clock cycles, 1≤w≤m, to finish one multiplication operation in GF(2m). The value of can be selected by designer to set the trade off between area and speed according to the application. The proposed multiplier has lower area complexity than bitparallel multiplier and is faster than bitserial ones. In addition, the proposed multiplier has higher regular architecture compared to other similar proposals and therefore, wellsuited for VLSI implementation and can be easily applied as a basic component for computing complex operations over finite field, such as exponentiation and division operation. 

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